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mpn: TS128MFB72V6U-T

1GB 667MHZ DDR2 240PIN DIMM ECC FB CL5

Highlights

  • 240pin fully buffered dual in-line memory module
  • 3.2Gb/s, 4.0Gb/s link transfer rate
  • Buffer interface with high-speed differential point-to-point link at 1.5 volt
  • Channel error detection and reporting
  • Channel fail over mode support
  • Serial presence detect with EEPROM
  • Posted CAS
  • Automatic DDR2 DRAM bus and channel calibration

Marketing description

The TS128MFB72V6U-T is a 128M x 72bits ECC DDR2-667 fully buffered DIMM. The TS128MFB72V6U-T consists of 9 pcs 128M x 8bits DDR2 SDRAMs in 68 ball FBGA package, 1 pcs AMB IC, and a 2048 bits serial EEPROM on a 240-pin printed circuit board. The TS128MFB72V6U-T is a 240pin fully buffered dual in-line memory module.
The advanced memory buffer also allows buffering of memory traffic to support large memory capacities. All memory control for the DRAM resides in the host, including memory request initiation, timing, refresh, scrubbing, sparing, configuration access, and power management. The advanced memory buffer interface is responsible for handling channel and memory requests to and from the local DIMM and for forwarding requests to other DIMMs on the memory channel. Fully buffered DIMM provides a high memory bandwidth, large capacity channel solution that has a narrow host interface.

Capacity

Upgrade Type

Type

Technology

Form Factor

Standard Warranty


TS128MFB72V6U-T

1GB 667MHZ DDR2 240PIN DIMM ECC FB CL5

Highlights

  • 240pin fully buffered dual in-line memory module
  • 3.2Gb/s, 4.0Gb/s link transfer rate
  • Buffer interface with high-speed differential point-to-point link at 1.5 volt
  • Channel error detection and reporting
  • Channel fail over mode support
  • Serial presence detect with EEPROM
  • Posted CAS
  • Automatic DDR2 DRAM bus and channel calibration

Marketing description

The TS128MFB72V6U-T is a 128M x 72bits ECC DDR2-667 fully buffered DIMM. The TS128MFB72V6U-T consists of 9 pcs 128M x 8bits DDR2 SDRAMs in 68 ball FBGA package, 1 pcs AMB IC, and a 2048 bits serial EEPROM on a 240-pin printed circuit board. The TS128MFB72V6U-T is a 240pin fully buffered dual in-line memory module.
The advanced memory buffer also allows buffering of memory traffic to support large memory capacities. All memory control for the DRAM resides in the host, including memory request initiation, timing, refresh, scrubbing, sparing, configuration access, and power management. The advanced memory buffer interface is responsible for handling channel and memory requests to and from the local DIMM and for forwarding requests to other DIMMs on the memory channel. Fully buffered DIMM provides a high memory bandwidth, large capacity channel solution that has a narrow host interface.

Technical Specifications

Capacity
Upgrade Type
Type
Technology
Form Factor
Speed
Latency Timings
Data Integrity Check
Features
Module Configuration
Chips Organization
Voltage
Compatible Slots
Service & Support
Designed For
Product Description
Product Type
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Manufacturer Warranty
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last_sync

Standard Warranty